[gem5-users] size variable in Packet class

[Google]

Hi all,

I am asking a very basic question but I am confused as to what the size variable in Packet class represents. When I ran dram/sweep.py config file, I saw that the size turns out to 1,4,8, and 64 for different cases. In the packet.hh, the comment says that size represents the size of request or transfer, so is it in bits or bytes ?
There is a data pointer (*data, packet.hh line 333). I want to print out the data that this pointer points to for that I need to know the size of the request made and accordingly the data will be printed. So I am not able make out whether size is in terms of bits or bytes.

Thanks in advance.

Regards,
Riddhi

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[Nikos Nikoleris]

Hi Riddhi,

The size field in the packet class is in bytes. To print the data of a packet you could use the following:

DDUMP(Flag, pkt->getConstPtr<uint8_t>(), pkt->getSize());

Where Flag is the debugging flag that will enable the print and pkt is the packet you want to print. You will also need to include the header “base/trace.hh”.

Nikos

From: gem5-users <gem5-users-***@gem5.org> on behalf of Google <***@gmail.com>
Reply-To: gem5 users mailing list <gem5-***@gem5.org>
Date: Tuesday, 10 July 2018 at 07:51
To: "gem5-***@gem5.org" <gem5-***@gem5.org>
Subject: [gem5-users] size variable in Packet class

Hi all,

I am asking a very basic question but I am confused as to what the size variable in Packet class represents. When I ran dram/sweep.py config file, I saw that the size turns out to 1,4,8, and 64 for different cases. In the packet.hh, the comment says that size represents the size of request or transfer, so is it in bits or bytes ?
There is a data pointer (*data, packet.hh line 333). I want to print out the data that this pointer points to for that I need to know the size of the request made and accordingly the data will be printed. So I am not able make out whether size is in terms of bits or bytes.

Thanks in advance.

Regards,
Riddhi

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IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

[Google]

Hi Nikos,

Thanks for your prompt reply. I have one more doubt. Suppose the size of the packet is 64 bytes, and the pointer from getConstPtr<uint8_t>() will point to 1 byte data, so for getting all the 64 bytes data, I have to increment this pointer, right?

Thanks in advance.

Regards,
Riddhi

Sent from Mail for Windows 10

[Nikos Nikoleris]

Hi Riddhi,

Indeed, this is what the DDUMP() macro does, you can either use that or do it on your own.

Nikos

From: gem5-users <gem5-users-***@gem5.org> on behalf of Google <***@gmail.com>
Reply-To: gem5 users mailing list <gem5-***@gem5.org>
Date: Tuesday, 10 July 2018 at 09:05
To: "gem5-***@gem5.org" <gem5-***@gem5.org>
Subject: Re: [gem5-users] size variable in Packet class

Hi Nikos,

Thanks for your prompt reply. I have one more doubt. Suppose the size of the packet is 64 bytes, and the pointer from getConstPtr<uint8_t>() will point to 1 byte data, so for getting all the 64 bytes data, I have to increment this pointer, right?

Thanks in advance.

Regards,
Riddhi

Sent from Mail<https://go.microsoft.com/fwlink/?LinkId=550986> for Windows 10

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

[Google]

Hi Nikos,

Thanks once again. I figured that out.

Can you help me in getting instruction trace for ALU ? I tried doing this for X86 system.
What I am trying to do us to get instruction traces for ALU.
What I did:
There is a file, regop.isa (src/arch/x86/isa/microops/). In this file, at line 506, ADD function is defined. I tried to get the values of psrc1, op2 and DestReg, but I don’t think that these are instruction trace. I have attached a patch of results below:

2117728 8 2117736
27263459 0 27263459
2117736 8 2117744
29360611 0 29360611
2117744 8 2117752
31457763 0 31457763
2117752 8 2117760
33554915 0 33554915
2117760 8 2117768
35652067 0 35652067
2117768 8 2117776
37749219 0 37749219
2117776 8 2117784
39846371 0 39846371
2117784 8 2117792
2117792 8 2117800
2117800 8 2117808
2117808 8 2117816
2117816 8 2117824
2117824 8 2117832
2117832 8 2117840
2117840 8 2117848

The first column is for psrc1, second for op2 and third is for DestReg. If u notice every time the DestReg becomes psrc1 for next operation. And this kind of pattern is observed in complete traces. I don’t think this is the instruction trace for ALU. And I am not able to find where the ALU instructions are defined. I also tried getting traces from mediaop.isa (same folder), but sometimes traces are not at all generated. I don’t why.

Any suggestions would a great help to me.

Thanks in advance.

Regards,
Riddhi

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[Nikos Nikoleris]

Hi Riddhi,

I am not familiar with a way to trace the ALU operations and operands. You could trace the micro-ops and macro-ops and then post-process the trace to filter out the ALU operations. If you wish to do that then have a look at the Exec* debug flags. I believe the debug flags ExecEnable,ExecMicro,ExecMacro,ExecUser,ExecKernel will be useful.

Nikos

From: gem5-users <gem5-users-***@gem5.org> on behalf of Google <***@gmail.com>
Reply-To: gem5 users mailing list <gem5-***@gem5.org>
Date: Tuesday, 10 July 2018 at 12:13
To: "gem5-***@gem5.org" <gem5-***@gem5.org>
Subject: Re: [gem5-users] size variable in Packet class

Hi Nikos,

Thanks once again. I figured that out.

Can you help me in getting instruction trace for ALU ? I tried doing this for X86 system.
What I am trying to do us to get instruction traces for ALU.
What I did:
There is a file, regop.isa (src/arch/x86/isa/microops/). In this file, at line 506, ADD function is defined. I tried to get the values of psrc1, op2 and DestReg, but I don’t think that these are instruction trace. I have attached a patch of results below:

2117728 8 2117736
27263459 0 27263459
2117736 8 2117744
29360611 0 29360611
2117744 8 2117752
31457763 0 31457763
2117752 8 2117760
33554915 0 33554915
2117760 8 2117768
35652067 0 35652067
2117768 8 2117776
37749219 0 37749219
2117776 8 2117784
39846371 0 39846371
2117784 8 2117792
2117792 8 2117800
2117800 8 2117808
2117808 8 2117816
2117816 8 2117824
2117824 8 2117832
2117832 8 2117840
2117840 8 2117848

The first column is for psrc1, second for op2 and third is for DestReg. If u notice every time the DestReg becomes psrc1 for next operation. And this kind of pattern is observed in complete traces. I don’t think this is the instruction trace for ALU. And I am not able to find where the ALU instructions are defined. I also tried getting traces from mediaop.isa (same folder), but sometimes traces are not at all generated. I don’t why.

Any suggestions would a great help to me.

Thanks in advance.

Regards,
Riddhi

Sent from Mail<https://go.microsoft.com/fwlink/?LinkId=550986> for Windows 10

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

[Google]

Hi Nikos,

Thanks again. You actually did give an useful hint.
I used these flags, and I got following type of data:
....
system.cpu 0x3698a02f73 : mov DS:[r12 + 0x340], rsi
system.cpu 0x3698a02f73.0 : MOV_M_R : st rsi, DS:[r12 + 0x340] :
system.cpu 0x3698a02f7b : sub rsi, DS:[r12]
system.cpu 0x3698a02f7b.0 : SUB_R_M : ld t1, DS:[r12] :
system.cpu 0x3698a02f7b.1 : SUB_R_M : sub rsi, rsi, t1 :
system.cpu 0x3698a02f7f : add DS:[r12 + 0x348], rsi
system.cpu 0x3698a02f7f.0 : ADD_M_R : ldst t1, DS:[r12 + 0x348] :
system.cpu 0x3698a02f7f.1 : ADD_M_R : add t1, t1, rsi :
system.cpu 0x3698a02f7f.2 : ADD_M_R : st t1, DS:[r12 + 0x348] :
system.cpu 0x3698a02f87 : add DS:[r12 + 0x350], rsi
system.cpu 0x3698a02f87.0 : ADD_M_R : ldst t1, DS:[r12 + 0x350] :
system.cpu 0x3698a02f87.1 : ADD_M_R : add t1, t1, rsi :
system.cpu 0x3698a02f87.2 : ADD_M_R : st t1, DS:[r12 + 0x350] :
system.cpu 0x3698a02f92 : add rcx, DS:[r12 + 0x10]
system.cpu 0x3698a02f92.0 : ADD_R_M : ld t1, DS:[r12 + 0x10] :
system.cpu 0x3698a02f92.1 : ADD_R_M : add rcx, rcx, t1 :
system.cpu 0x3698a02f97 : mov DS:[r12], rsi
....

From this I can make out that ADD instruction are taking place. Consider this: ADD_R_M: add rcx, rcx, t1: I want the value of these variable rcx, t1, etc. If you can think of someway to get this, then it would be great.

Thanks a lot for your help. It was really helpful.

Regards,
Riddhi

Sent from Mail for Windows 10

[Nikos Nikoleris]

Riddhi,

You can get the values of these registers if you add some more Exec* flags. IIRC ExecResult might be useful as well. You can see the full list of debug flags with --debug-help.

Nikos


From: gem5-users <gem5-users-***@gem5.org> on behalf of Google <***@gmail.com>
Reply-To: gem5 users mailing list <gem5-***@gem5.org>
Date: Wednesday, 11 July 2018 at 10:52
To: "gem5-***@gem5.org" <gem5-***@gem5.org>
Subject: Re: [gem5-users] size variable in Packet class

Hi Nikos,

Thanks again. You actually did give an useful hint.
I used these flags, and I got following type of data:
....
system.cpu 0x3698a02f73 : mov DS:[r12 + 0x340], rsi
system.cpu 0x3698a02f73.0 : MOV_M_R : st rsi, DS:[r12 + 0x340] :
system.cpu 0x3698a02f7b : sub rsi, DS:[r12]
system.cpu 0x3698a02f7b.0 : SUB_R_M : ld t1, DS:[r12] :
system.cpu 0x3698a02f7b.1 : SUB_R_M : sub rsi, rsi, t1 :
system.cpu 0x3698a02f7f : add DS:[r12 + 0x348], rsi
system.cpu 0x3698a02f7f.0 : ADD_M_R : ldst t1, DS:[r12 + 0x348] :
system.cpu 0x3698a02f7f.1 : ADD_M_R : add t1, t1, rsi :
system.cpu 0x3698a02f7f.2 : ADD_M_R : st t1, DS:[r12 + 0x348] :
system.cpu 0x3698a02f87 : add DS:[r12 + 0x350], rsi
system.cpu 0x3698a02f87.0 : ADD_M_R : ldst t1, DS:[r12 + 0x350] :
system.cpu 0x3698a02f87.1 : ADD_M_R : add t1, t1, rsi :
system.cpu 0x3698a02f87.2 : ADD_M_R : st t1, DS:[r12 + 0x350] :
system.cpu 0x3698a02f92 : add rcx, DS:[r12 + 0x10]
system.cpu 0x3698a02f92.0 : ADD_R_M : ld t1, DS:[r12 + 0x10] :
system.cpu 0x3698a02f92.1 : ADD_R_M : add rcx, rcx, t1 :
system.cpu 0x3698a02f97 : mov DS:[r12], rsi
....

From this I can make out that ADD instruction are taking place. Consider this: ADD_R_M: add rcx, rcx, t1: I want the value of these variable rcx, t1, etc. If you can think of someway to get this, then it would be great.

Thanks a lot for your help. It was really helpful.

Regards,
Riddhi

Sent from Mail<https://go.microsoft.com/fwlink/?LinkId=550986> for Windows 10

IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

[Google]

Hi Nikos,

Thanks for your help.

I tried all possible flags, but I was not able to get the value of those variables. If you come across any different approach, then do suggest😊

Thanks again.

Riddhi

Sent from Mail for Windows 10