2018-11-15 11:08:37 UTC
I am trying to add a new instructions in Gem5 ARM (FS mode) which can support loading from two memory addresses into two registers. (The memory addresses are already stored in two system registers).
I want to implement it in the Minor CPU (specifically, HPI mode).
During developing, I met one problem:
The memory load operation implemented in Minor CPU requires the instruction to invoke "initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);" in initiateAcc stage, and invoke "getMem(pkt, Mem, traceData);" in the completeAcc stage.
The completeAcc will get one packet from pipeline and then read the data from the packet.
It seems I need to modify the Minor CPU's code for multiple memory load...
Any advices about this?
Thanks a lot!